008 |
|
200226s2000 ch adke bm 000 0 chi d |
020 |
|
|c(平裝)
|
040 |
|
|aNOU|bchi
|
041 |
0
|
|aeng|bchi|beng
|
084 |
|
|a312.9|b7213|2ncsclt
|
095 |
|
|aLB|bLBA|c0093603|d312.9|e7213|fwill|n贈書|pTH
|
100 |
1
|
|a劉一宇|e撰
|
245 |
10
|
|a以二元決策圖合成低功率之PTL=|bLow Power Driven Pass Transistor Logic Synthesis by Binary Decision Diagrams/|c劉一宇撰
|
246 |
10
|
|aLow Power Driven Pass Transistor Logic Synthesis by Binary Decision Diagrams
|
260 |
|
|c民89
|
300 |
|
|a37面:|b圖, 表;|c29公分
|
500 |
|
|a指導教授:黃婷婷
|
502 |
|
|b碩士論文|c國立清華大學資訊工程學系碩士班|d2000
|
504 |
|
|a參考書目:面35-37
|
546 |
|
|a中文, 英文摘要
|