001 |
|
99601 |
020 |
|
|a9780306476877 (electronic bk.)
|
020 |
|
|a9780792377665 (paper)
|
050 |
00
|
|aTK7885.7|b.B47 2002|cB496
|
082 |
00
|
|a621.3815|221
|
090 |
|
|aTK7885.7|b.B496 2002
|
809 |
|
|pEB|dTK7885.7|eB496|y2002
|
100 |
1
|
|aBergeron, Janick.
|
245 |
10
|
|aWriting testbenches|h[electronic resource] :|bfunctional verification of HDL models /|cJanick Bergeron.
|
260 |
|
|aBoston :|bKluwer Academic,|cc2002.
|
300 |
|
|axxii, 354 p. :|bill., digital ;|c25 cm.
|
650 |
0
|
|aComputer hardware description languages.
|
650 |
0
|
|aIntegrated circuits|xVerification.
|
710 |
2
|
|aSpringerLink (Online service)
|
773 |
0
|
|tSpringer e-books
|
856 |
40
|
|uhttp://dx.doi.org/10.1007/b116577
|
950 |
|
|aComputer Science
|