001 |
|
99423 |
020 |
|
|a9780306470165 (electronic bk.)
|
020 |
|
|a9780792377887 (paper)
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050 |
00
|
|aTK7874.75|b.B47 2002|cB467
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082 |
00
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|a621.392|221
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090 |
|
|aTK7874.75|b.B467 2002
|
809 |
|
|pEB|dTK7874.75|eB467|y2002
|
100 |
1
|
|aBening, Lionel.
|
245 |
10
|
|aPrinciples of verifiable RTL design|h[electronic resource] :|ba functional coding style supporting verification processes in Verilog /|cLionel Bening and Harry Foster.
|
260 |
|
|aNorwell, Mass. :|bKluwer Academic Publishers,|cc2002.
|
300 |
|
|axvii, 253 p. :|bill., digital ;|c24 cm.
|
650 |
0
|
|aElectronic digital computers|xComputer-aided design.
|
650 |
0
|
|aIntegrated circuits|xVery large scale integration|xComputer-aided design.
|
650 |
0
|
|aVerilog (Computer hardware description language)
|
700 |
1
|
|aFoster, Harry.
|
710 |
2
|
|aSpringerLink (Online service)
|
773 |
0
|
|tSpringer e-books
|
856 |
40
|
|uhttp://dx.doi.org/10.1007/b116517
|
950 |
|
|aComputer Science
|